Field of the Invention
The invention relates to a method and to a device for conditioning at least one Phase Change Memory, PCM, cell having a number of pre-defined characteristics.
Description of Related Art
Phase change memory (PCM) is a non-volatile solid-state memory technology that exploits the reversible, thermally-assisted switching of specific chalcogenides between certain states of different electrical conductivity.
PCM is a promising and advanced emerging non-volatile memory technology mainly due to its excellent features including low latency, high endurance, long retention and high scalability. PCM can be considered a prime candidate for Flash replacement, embedded/hybrid memory and storage-class memory. Key requirements for competitiveness of PCM technology can be multi-level cell functionality, in particular for low cost per bit, and high-speed read/write operations, in particular for high bandwidth. Multilevel functionality, i.e. multiple bits per PCM cell, can be a way to increase capacity and thereby to reduce cost.
Multi-level PCM is based on storing multiple resistance levels between a lowest (SET) and a highest (RESET) resistance value. Multiple resistance levels or levels correspond to partial-amorphous and partial-crystalline phase distributions of the PCM cell. Phase transformation, i.e. memory programming, can be enabled by Joule heating. In this regard, Joule heating can be controlled by a programming current or voltage pulse. Storing multiple resistance levels in a PCM cell is a challenging task.
For example, FIG. 1 shows a diagram illustrating a RESET pulse and a SET pulse for programming a PCM cell. The x-axis of diagram of FIG. 1 shows the time t and the y-axis shows the temperature T and the current I. The RESET pulse is shorter than the SET pulse, but has a higher current amplitude. Further, the RESET pulse exceeds the melting temperature T_melt. In contrast, the SET pulse lies between the melting temperature T_melt and the glass temperature T_glass.
An ideal non-volatile memory technology possesses a number of characteristics or features that enable it to be used in many different applications and across vastly different workloads. Such features include a high programming speed, low programming power, low cost per bit, reliability, in terms of stability of the stored information with time and/or temperature, high cycling endurance and large noise margins for low error rates. Endurance effects on the cell programming characteristics are commonly known in the art.
Regarding the high programming speed, fast read and writes are crucial in high-performance main memory applications which are conventionally served by DRAM mainly. Regarding the low programming power, the approach is to minimize the energy per bit stored. This can be crucial for embedded applications and for scaling to future technology nodes. Regarding low cost per bit, this can at least partially be achieved by multi-level cell (MLC) storage.
Conventional non-volatile memory technologies posses only a subset of the above features, which makes them unsuitable for universal memory. In particular, flash suffers from very long write/erase latencies and low endurance, which can preclude its usage as main memory or even as hybrid memory, e.g. with DRAM as cache, or serving as cache to DRAM. PCM, in turn, exhibits relatively high energy per bit for writing and can have reliability problems, mainly because of short-term resistance drift.
Resistive RAM, in particular ionic-based, on the other hand, can suffer from low reliability, both in terms of endurance and cell-state retention.
Typically, improvements in one or more of the above desirable features can be achieved at the cost of deterioration in another desirable feature. A conventional trade-off is the increase of the resistance margin (R-margin) between the low-resistance state (SET) and the high-resistance state (RESET) which enables MLC storage at the expense of higher programming power, which typically is detrimental for cell endurance.
Accordingly, it is an aspect of the present invention to tailor the characteristics of a PCM cell.